The present invention relates to the fabrication of electronic devices. More particularly, the invention relates to a method of incorporating semiconductors into flexible, foldable, and stretchable devices.
Semiconductors have been used for a number of decades in the construction of a large number of useful devices. Countless technological advances in a great number of fields can be traced to the inclusion of semiconductor technology.
A semiconductor device is typically built upon a silicon wafer. In many cases this architecture is suitable for the application in which the device is to serve, despite the fact that silicon wafers are rigid and brittle. However, other types of devices that rely on semiconductor technology, such as medical devices, would benefit from a more flexible format in order to reduce the chances of cracking or breaking.
Existing fabrication techniques such as direct coating and patterning organic or inorganic semiconductor materials on flexible substrates have been developed, as described in, for instance, U.S. Pat. No. 8,394,706, U.S. Pat. No. 7,557,367, US Publication No. 2011/0220890 A1, US Publication No. 2010/0002402 A1, and US Publication No. 2009/0294803 A1, all of which are incorporated herein by reference in their entireties. However, the nature of the materials used in such flexible devices can preclude the use of processes that require high temperature processes. This further limits the range of materials that can be incorporated and may reduce the effective performance of the device. Moreover, recently developed transfer printing technology has limited utility due to its incompatibility with established complementary metal-oxide-semiconductor (CMOS) technology.
Other fabrication techniques are detailed in publication WO 2013/009833 A1, which is incorporated herein by reference in its entirety. However, because the devices made as described in this application are not patterned into the device layer into discrete islands, they are not stretchable, and the methods described therein preclude the manufacture of tubes and channels.
A number of different approaches of making flexible sensors or electronics have been developed over the last two decades. A straightforward method is to fabricate directly on a flexible substrate, such as the widely used flexible printed circuitry technology and the thin film transistor (TFT) technology on flexible substrates. One example of such an application is the development of flexible large area position sensitive detectors made by depositing amorphous silicon on a polyimide substrate. Flexible multichannel sieve electrodes for interfacing regenerating peripheral nerves on polyimide film have been made using a silicon wafer as a support, resulting in improved dimension control. Simple microelectricalmechanical system (MEMS) structures on plastic substrates, such as amorphous silicon air-gap resonators, have also been demonstrated.
Direct fabrication on flexible substrates offer simple fabrication processes combined with low cost. Large area flexible sensors or electronics can be fabricated in this way. However, high temperature processes cannot be employed and optimization of material properties is difficult since the process temperature is limited due to the nature of the flexible substrate. Limiting the temperature limit makes it almost impossible to monolithically integrate CMOS circuits and many MEMS transducers to the flexible substrate.
Transfer printing methods to make flexible electronics have been demonstrate recently. In these processes, transistors and other devices are fabricated first on silicon-on-insulator (SOI) wafers and then transferred to flexible substrates by a process analogous to printing. Still, the transfer printing step is generally incompatible with commercial CMOS processes. As a result, current transfer printing methods cannot take advantage of mainstream CMOS technology. Consequently, circuit density and performance are limited.
It has been a challenge to design a method for manufacturing flexible, foldable, and stretchable devices that are compatible with established SOI-CMOS processes.